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Energy Consumption Looms Large in Choosing Flash for Portable Applications

By Jim Handy
Integrated System Design
Posted 07/11/01, 03:34:30 PM EDT

Many flash memory chips seem nearly identical in a number of technical specifications. But many designers don't realize how dramatically energy consumption differs among relatively similar flash memory chips.

Designers often use the term “power” almost interchangeably with “battery life.” However, the successful designer needs to focus on energy consumption rather than power, since there is a limited supply of energy in a battery, even though the power a battery is required to supply can vary over a substantial range during the course of its life.

With a little effort, a single system can be designed to work with parts from any of a number of manufacturers.

To illustrate, we will compare the specifications of a few roughly equivalent flash memory devices,using readily available data sheets. To level the playing field, we have chosen a simple 4-Mbit,byte-wide 90-ns chip. All the devices operate at a supply voltage of 2.7 V to 3.6 V. The analysis is based upon a comparison of maximum ratings. It's a simple approach that takes a few minutes for anyone trying to narrow choices.

Read specifications tend to be the most consistent specification across any range of devices that share the same read access time.

Since the read access time is usually one of the key selection criteria for a device, there is usually little difference between any two devices. We will also assume that the designer is choosing parts that operate at the same voltage. In this case the only differentiator seems to become read current consumption. Yet most devices have relatively similar read currents,so is there anything more that a designer can do?

Read power and read cycle time tend to be very similar among the many different “roughly equivalent” flash memories available today. This strong similarity stands vastly apart from the orders-of-magnitude difference in write cycle and erase cycle energy consumption.

Differences among flash chips during a write cycle may also seem relatively small when the designer looks only at power consumption, but when energy consumption is considered this becomes a very different matter. Voltage once again is the constant in the energy equation. The write cycle currents for the parts we researched in this article span only a little more than a 2:1 range, from 55 mA down to 20 mA, so it would seem that energy consumption would track this measurement. This, though, ignores the dimension of time, which is key to calculating overall energy consumption.

How much time does it take to write to the part? Since different flash chips write in ifferent ways, the only fair assessment for this sort of general analysis involves overwriting the entire chip. That takes almost 30 seconds for the slowest part,about 10 seconds for the fastest one. Still, this represents only a 3:1 difference, which is not that large. What is interesting, though, is that of the mainstream parts tested, the one with the highest write current is also the one with the longest write time.

When you multiply the time required to perform the write by the current consumed and the voltage applied, the result is a write energy consumption of 4.9 J for the most power hungry of the parts evaluated vs.0.6 J for the lowest-energy part. In comparison with the 2:1 or 3:1 differences in write current and write time,there is a more substantial 8:1 difference between the write energy consumed by the high-energy part and that consumed by the more energy efficient part, with smaller differences separating other in-between products. Three examples are shown in Fig.1.

Erase energy

Flash chips must be erased every time new data is programmed into a sector. In erase cycles, the differences between any two parts 'energy consumption can be even more substantial. Once again, the differences between currents and erase times end up being far smaller than the difference between the subject components' erase energy consumption.

The erase current consumption of the highest-current chip is 45 mA, of the lowest-current chip it 's 20 mA:a dif- ference once again of a little over 2:1. The erase time (once again,to erase the entire chip -for fairness 'sake) ranges from 40 seconds down to 0.1 second, this time a very appreciable 400:1 range.

Once again,the highest-current chip also happens to be the chip that has the longest erase time and the low- est-current chip is one that has the shortest erase time. This means that the difference in erase energy between the most and least energy hungry parts is 5.4 J vs.6 mJ for a whopping 900:1 difference. Fig.1c illustrates this.

Why have we been taking such pains to be fair by comparing total chip write and total chip erase? Because there is yet another dimension to consider that can drastically alter energy consumption during erase and write cycles. That difference is sector size.

Some flash memories use smaller erase sectors than others. At first,this might appear simply to be a way to reduce the headaches that come with flash technology. After all,in a flash memory you can't overwrite a byte without first erasing it and then you can 't erase just one byte,you must erase the whole sector. It is only natural that a smaller sector would be more convenient than a larger sector. But that is only a small part of the story.

When a single byte does need changing, the entire sector must be read into some sort of buffer and merged with the new byte of data. Then the original sector must be erased before the new data is written back into it (see Fig.2,page 50). This shell game is a challenge that is always encountered while using flash memory. Often the data is moved to an SRAM, which acts as a holding area while the sector is being erased, although some systems avoid the additional cost of the SRAM by moving data from the original sector to another sector, then moving the data back to the original sector once that sector has been erased. Either way,this can be a very energy hungry operation,as the following analysis illustrates.

To modify a single byte, the data must be read from the sector into the buffer space. The originating sector is then erased. Finally, data is written back into the sector from the buffer. The energy consumed will be a function of the sector size. Most leading 4-Mbit flash chips have a sector size of 64 kbytes. Some parts offer a 4-byte sector and other parts have a size of only 128 bytes.

To perform a single-byte modify in the parts with 64- kbyte sectors will require 64-k read cycles, a sector erase, then 64-k write cycles,assuming that an external SRAM is used for the buffer. If an internal flash buffer is used, these numbers must be doubled -- two sector reads, two erase cycles and two sector writes. In the part with the 4-kbyte sector size,only 4-k read cycles,an erase then 4-k write cycles must be performed. It is pretty easy to see how this can save powe. Assuming identical erase and write energy consumption figures, this automatically translates to an 8:1 power savings. In the part with the 128-byte sector,the energy consumption would be 1/512th that of the 64-kbyte sector device and 1/64th that of the 4-kbyte sector chip.

That would be so only in the ideal world,where energy consumption was the same for all parts' total chip erase and write functions. But what really happens?

Interestingly,the parts with the smallest sectors happen to be the ones with the lowest erase energy consumption. Without going into a lot of details, we will see that the 128-byte part can perform an erase, followed by an entire sector write consuming 1.5 mJ. The part with the 4-kbyte sector size consumes only three times the energy or 5 mJ.Where it eally gets interesting is in the part with the large sector size. To perform the same modification of a single byte in one part with a 64-kbyte sector size would consume almost 1.3 J,about 1,000 times the power of the part with the 128-byte sectors and 258 times the energy consumption of the 4-kbyte sector device. One single-byte update in the energy hungry part would consume as much battery energy as would 258 such operations in the 4-kbyte-sector part and 1,000 such operations in the flash with 128-byte sectors. In Fig.1c we had to change to a logarithmic Y axis to make the difference between the chips with 4-kbyte and 128-byte sectors even show up. When the same data is used with a linear Y axis, both chips C and D appear to consume zero energy during a sector modify. Designers can squeeze out additional energy savings if the sectors can fit within the scratch pad RAM of the controller.

Keep your software in mind

Of course, when you are using these numbers, it is imperative to understand your system's software. The power savings shown here will be proportional to the ratio of read-to-program cycles. Applications that simply use the flash for code storage and that do not store any data in the flash would not be burdened with many of the more phenomenal energy consumption problems outlined here. Unless the designer took advantage of the trick of using a faster part, all cycles would be equally long reads and the energy consumption of the chips would be approximately the same. Applications in which data tables are frequently changed would consume significantly more energy if a high-current flash were chosen.

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